This invention relates to methods of manufacture of semiconductor devices, and more particularly to the selective oxidation of a silicon surface in manufacture of such devices.
One of the most widely used methods for making semiconductor integrated circuits today is the N-channel silicon gate self-aligned process for making MOS devices. This process employs an oxidation mask such as silicon nitride to define "moat" areas or to define areas to be surrounded by thick field oxide. The field oxide is usually grown by placing the silicon slices in a tube furnace in an oxidizing atmosphere for many hours at about 1000.degree. C. Aside from the delays in manufacturing caused by the lengthy diffusion steps, the diffusion of oxygen underneath the edges of the mask becomes significant when the slices are maintained at high temperatures for such long time periods. Oxide growth due to this diffused oxygen buckles the mask and renders this portion of the masked area or moat unusable, placing a lower limit on the size of various parts of the integrated circuit. As the component density increases, this limit can become a very important factor. Manufacture of dynamic memory devices having 64K, or 65,536 bits with bar sizes of 35,000 square mils or less may require minimum widths of three microns for these moat areas. However, if the oxide encroachment beneath the mask edges is one micron on each side then one micron left in the center is hardly usable. Accordingly, oxide growth must be in some manner restricted. It has previously been reported that diffusion or implant of impurity in a semiconductor surface affects oxide growth rate; for example, in the manufacture of CMOS devices, the growth rate of gate oxide over N-type channels is greater than that over P-type channels, even though all other conditions are identical. This phenomonena has not been used to reduce the effects of moat encroachment.
It is the principal object of this invention to provide an improved method of selectively oxidizing a surface of a semiconductor device. Another object is to reduce the effect of moat encroachment in the manufacture of N-channel self aligned MOS integrated circuits.